By Laung-Terng Wang,Yao-Wen Chang,Kwang-Ting (Tim) Cheng
- Covers entire spectrum of the EDA circulate, from ESL layout modeling to logic/test synthesis, verification, actual layout, and try out - is helping EDA rookies to get "up-and-running" fast
- Includes complete assurance of EDA ideas, rules, facts buildings, algorithms, and architectures - is helping all readers increase their VLSI layout competence
- Contains most recent developments no longer but to be had in different books, together with try out compression, ESL layout modeling, large-scale floorplanning, placement, routing, synthesis of clock and power/ground networks - is helping readers to design/develop testable chips or items
- Includes best-practices anywhere applicable in so much chapters - is helping readers steer clear of expensive mistakes
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